Closed-loop Functional Electrical Stimulation (FES) devices generally require feedback information based on the “energy” contents of a sensed signal. Such feedback information may be obtained by detecting and amplifying selected bioelectrical signals. Circuitry for preconditioning signals to be used for feedback control typically includes a band-pass amplification circuit, a rectifier circuit and a bin-integration circuit. This circuitry provides a smoothed profile of the sensed activity. A rectifier circuit is needed because bioelectrical signals are typically alternating current (AC) signals. Such signals typically have low amplitudes. It is not uncommon for such signals to have amplitudes of less than 10 μV peak or even less than 3 μV peak. A voltage in AC signals oscillates with positive and negative excursions relative to a reference voltage level, typically the system ground. Rectification involves reversing the polarity of either the positive or negative going excursions, such that the rectified signal is comprised of a single polarity, either positive or negative.
In many applications, several different signals are simultaneously needed to control a prosthetic device; see for example U.S. Pat. No. 4,750,499 to Hoffer for a “Closed-Loop, Implanted-Sensor, Functional Electrical Stimulation System for Partial Restoration of Motor Functions”. This translates into the need for several rectifier circuits to be integrated into the same implantable device. Consequently, a suitable rectifier circuit should consume minimum power and preferably use no external components.
FIG. 1 shows a prior art high-impedance continuous-time precision full-wave rectifier circuit 20. Circuit 20 comprises two operational amplifiers (A1, A2). Diodes (D1, D2) within the feedback path provide the necessary non-inverting gain for positive source signals and inverting gain for negative source signals. Such circuits have drawbacks that prevent their use in a high-density, low-power closed-loop FES implantable device. These drawbacks include the following:                i) Distortion due to the fact that the diode (D1) feedback path becomes open circuit around the zero-crossing, resulting in a missing segment in the output waveform for a time interval (td); see K. Hayatleh et al., “Degradation Mechanisms in Operational Amplifier Precision Rectifiers”, IEEE Transactions on Circuits and Systems-I: Fundamental Theory and Applications, vol. 42, no. 8, August 1995, pp. 479-485;        ii) When i) occurs, the input is not driven sufficiently strongly to achieve the slew rate of the first amplifier (A1), and so the first amplifier (A1) operates in the linear region, typically resulting in a value of td about an order of magnitude larger. The first amplifier (A1) therefore consumes unnecessary power.        iii) If resistors (R) were fully integrated, they would have to be large in order to keep the power consumption low. This would occupy a large die area;        iv) Two operational amplifiers (A1, A2) are needed; and,        v) Standard CMOS technology does not provide the floating diodes required by circuit 20.        
Two different prior art circuits that overcome some of the limitations of the circuit of FIG. 1 were disclosed by Kimura in 1994; see U.S. Pat. No. 5,306,968 to Kimura for a “Rectifier Circuit Not Using Clock Signal”; and by A. Arnaud et al. in 1998; see A. Arnaud et al., “Design of a Micropower Signal Conditioning Circuit for a Peizoresistive Acceleration Sensor”, IEEE International Symposium on Circuits and Systems, vol. I, 1998, pp. 269-272.
FIG. 2 shows a prior art rectifier circuit 21 as disclosed by Kimura. The circuit comprises a polarity judgment circuit (C), a gain control circuit 22, a first amplifier 23, and a second amplifier 24. The signal to be rectified (Vin) is connected to the polarity judgment circuit (C) and the first amplifier 23. According to the output of the polarity judgment circuit (C), the gain-control circuit 22 provides two DC signals (VH, VL) to the second amplifier 24. These DC signals control the gain of the second amplifier 24. The output (Vout) is an amplified and rectified version of the source signal (Vin). Some disadvantages of circuit 21 are that several auxiliary DC voltages are needed to achieve rectification and that the gain of rectifier circuit 21 is highly dependent on process parameters.
FIG. 3 shows a prior art rectifier circuit 25 as disclosed by A. Arnaud et al. Circuit 25 operates in a manner similar to circuit 21. Here, a signal from polarity judgment circuit (C), is used to change the configuration of the operational amplifier (A) from an inverting amplifier to a follower and vice-versa according to the polarity of the input (Vin), using the switches 26 and inverter (T). A main disadvantage of circuit 25 that prevents implementation in a high-density, low-power device is that it requires two resistors (R). Resistors (R) need to be external in order for power consumption to be minimized. Another important disadvantage of circuit 25 is that it does not present sufficiently high input impedance if resistors (R) have values small enough that they can be practically integrated.
Weijand, European Patent No. 0 974 377 B1 ('377 patent) entitled “Full-wave Rectifier with Dynamic Bias” discloses a full-wave rectifier that is powered through movement or motion such as for use in pulse generation in a pacemaker. The Weijand device provides a full-wave rectifier circuit for rectification of a supply voltage on the order of one to three volts, or a frequency signal in the kHz range or higher, or both. The Weijand device uses four diodes implemented using field-effect transistors (“FETs”), which operate essentially as switches that turn on or off depending upon the voltage applied to control input gates. Weijand discloses that the voltage on one node must be slightly greater than the voltage on a second node, on the order of 10 to 15 mV, to reach an equilibrium wherein a FET turns off. Accordingly, Weijand discloses a threshold voltage of 10 to 15 mV, which is substantially less than the typical 0.7 V threshold voltage of conventional diodes. This threshold voltage is still too high to be suitable for rectifying low level bioelectrical signals.
Weijand, European Patent Application No. 0 976 420 A1 ('420 application) entitled “Movement Powered Timepiece Having a Full-wave Rectifier with Dynamic Bias” discloses a timepiece with a pulse generator which features a full-wave rectifier circuit which has a dynamic bias, such as the '377 patent. As with the '377 patent, the '420 application discloses a threshold voltage of 10 to 15 mV. Again, this is too high a threshold to be suitable for low level bioelectrical signals.
U.S. Pat. No. 5,173,849 to Brooks for “Integratable Synchronous Rectifier” discloses a rectifier that is integratable into VLSI “chip” form (such as NMOS or CMOS) for use in devices such as “smart” credit cards and identification devices.
U.S. Pat. No. 5,691,658 to Klein for “Current Mode Amplifier, Rectifier and Multi-Function Circuit” discloses amplifier circuits, a full-wave rectifier, a comparator, and a filter, all operating with current signals.
U.S. Pat. No. 5,999,849 to Gord et al. for “Low Power Rectifier Circuit for Implantable Medical Device” discloses a switched rectifier circuit that is realized using P-MOS and N-MOS FET switches that are turned on/off by a detector and inverter circuit. Parasitic diodes and transistors form an integral part of the FET circuitry to respond to and rectify the incoming signal during start up.
U.S. Pat. No. 4,473,757 to Farago et al. for “Circuit Means for Converting a Bipolar Input to a Unipolar Output” discloses a plurality of switching elements, preferably MOS transistors, connected in a bridge circuit. The bridge circuit has a pair of input terminals and a pair of output terminals, the input terminals receive an input signal of bipolar polarity for providing an output signal of a given polarity on the output terminals.
PCT Application No. WO 96/28879 of Scheelen for “Integrated Circuit Full-Wave Rectifier” discloses a full-wave rectifier circuit that is suitable for high power conversion, using voltage limiting means to allow voltage sensitive CMOS technology to be used. The Scheelen circuit can provide a direct connection to a source of voltage between 40 and 100 V, and may even be used at voltages up to 1100 V, including 600 V which is conventionally used for train and tram supplies.
The inventor has determined that there remains a need for a rectifying circuit with a low threshold voltage that can be fully integrated. There is a particular need for rectifying devices which are suitable for use in implantable biomedical devices, such as implantable systems for monitoring nerve signals for the control of prosthetic devices.